1. Field of the Invention
The present invention relates to differential transmission line drivers and more particularly to such drivers with a differential input and a differential output.
2. Background Information
FIG. 1 illustrate a box switch configuration 2 of four MOSFET's used by practitioners to drive transmission lines, logic system, motors, and other items where a full reversal of current through or logic levels across a load is advantageous. In particular when transferring logic data between systems or otherwise over transmission lines, FIG. 1 shows a box configuration for differentially transferring an input differential clock signal, CLK+, and CLK−, to a differential VOCLK signal sent over a transmission line that is terminated (and presumably matched) with a resistor, RL CLK. A similar box configuration is used to differentially transfer differential data, DATA+, DATA−, over another transmission line terminated with a resistor, RL DATA. The two transmission lines are in parallel, and, at the receiver, the clock signal is used to gate or strobe the data received into registers.
Briefly, operation of the schematic 2 will be described, and those skilled in the art will understand the operation of the box switch used for transmitting a clock signal VOCLK. Consider Vdd as a positive voltage source and Vss as ground. If CLK+ is high and CLK− low, M2 and M3 will be on and M1 and M4 will be off. Location 4 will be driven towards Vss via M2 and location 6 will be driven towards Vdd via M3. Current will flow from Vdd through M3, through the transmission line to RLCLK to location 4 and through M2 to Vss. Location 6 will be at a higher potential than will location 4. When CLK+ goes low and CLK− goes high, M1 and M4 will be on and M2 and M3 will be off. Here current will flow through RLCLK in the opposite direction and location 4 will be at a higher potential than will location 6. This full logic reversal basically doubles the signal compared to driving a single ended clock through the transmission line.
The operation of the circuit 2 for data is similar to the description above.
Since there are two circuits, one for data and one for the clock in FIG. 1, the power dissipated is double that for one such circuit. In some prior art configurations for a single box switch, a current source may be used in place of a voltage source. (Id is shown replacing Vdd, but it may, instead, replace Vss.) If a current or voltage power source Is used, as known to those skilled in the art, the voltage compliance of the sources and devices must allow for proper logic operation of the box switches and signal levels at the clock and data inputs and at the receiving ends of the transmission lines.